The RISC-V ISA is kept minimal to allow for area and energy optimized designs. While the ISA is kept minimal, modern features are often desired which "bolt on" additional functionality.

Standard Extensions

These Standard Extensions are well defined within the ISA, and are as follows.
IInteger base instructions
MInteger multiplication and division instructions
AAtomic instructions
FSingle-precision floating-point instructions
DDouble-precision floating-point instructions
GGeneral(roll-up of I + M + A + F + D above)
QQuad-precision floating-point instructions
LDecimal floating point instructions
CCompressed instructions
BBit manipulation instructions
JDynamically translated languages
TTransactional memory instructions
PPacked-SIMD instructions
VVector operations instructions
NUser-level interrupt instructions
Ordering of the table above must be strictly followed when naming ISA extensions.
  • RV64GQLC is valid
  • RV64ABCD is not valid

Non-standard Extensions

3rd parties are free to implement their own extensions if desired. These are named as follows.
XasdNon-standard User-level extension "asd"
SXasdNon-standard Supervisor-level extension "asd"
As an example: RV64GQXasd